Processor and electronic device including the same
US12190845B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2022 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jan 13, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a host processor including a data transmitter, a driving driver, and a display panel. The data transmitter includes a phase locked loop that generates a first clock and a second clock, a clock block that receives the first clock, a plurality of data blocks that receives the second clock, a first buffer connected between the phase locked loop and the clock block, and a plurality of second buffers respectively connected between the phase locked loop and the plurality of data blocks, and the first buffer and each of the plurality of second buffers may be activated or deactivated depending on an interface mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.