Patent · US Active

Memory array, memory cell, and data read and write method thereof

US12190929B2 · kind B2 · utility

0Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 9, 2022
Grant dateJan 7, 2025
Priority date
Expiry dateApr 15, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/1693
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a memory array, a memory cell, and a data read and write method thereof. Two storage nodes are provided in each memory cell of a memory array of a magnetic random access memory (MRAM), such that when one storage node in the memory cell fails, the other storage node in the memory cell can be used to write and read data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.