System and method for refreshing dynamic random access memory
US12190936B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2023 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jul 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A refresh circuit selects a candidate bank for refreshing from various banks of a dynamic random access memory (DRAM). Initially, the refresh circuit checks if any bank is idle (e.g., is not targeted for memory operations). If two or more banks are idle, the candidate bank is selected based on a count of accesses targeted to each occupied bank and bank-pair distances between each pair of idle and occupied banks. Conversely, if all banks are occupied, the refresh circuit selects the candidate bank based on a count of data accesses targeted to each bank and/or a count of parity accesses targeted to each bank. Each data access has the same type as that scheduled for execution on the DRAM. Once the candidate bank is selected, the refresh circuit triggers the refresh of the candidate bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.