Method for manufacturing semiconductor structure, semiconductor structure, and memory
US12191154B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2021 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Mar 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application provides a method for manufacturing a semiconductor structure, a semiconductor structure, and a memory. The method for manufacturing a semiconductor structure includes the following steps: providing a substrate, and forming a stabilizing layer on the substrate; forming a stabilizing structure consisting of a plurality of linear structures and grooves among the linear structures; forming a hard mask layer covering the stabilizing structure; forming a mask pattern connected to a top of the linear structure and an inner wall of the groove on the hard mask layer; and transferring the mask pattern to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.