Method of forming engineered wafers
US12191192B2 · kind B2 · utility
0Cited by
5References
18Claims
0Family size
Inventor
Key dates
| Filing date | Nov 27, 2018 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Nov 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Ions are implanted into a first wafer through a top side, generating an ion damaged layer underneath the substrate film of the first wafer. A stress inducing layer is applied on a surface on the top side of the first wafer on one of the ion implanted side and the opposite side. The substrate film is separated from the first wafer at the ion damaged layer. the separated substrate film is bonded to a second wafer at a surface on one of a first side and a second side that this opposite of the first side of the second wafer to form an engineered wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.