Panel and manufacturing method thereof
US12191319B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jul 9, 2021 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Feb 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/851
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the application discloses a panel and a manufacturing method thereof. In the panel, a thin-film transistor layer, a first conductive layer, a light-emitting diode (LED), and a second conductive layer are sequentially disposed on a substrate. The LED includes a first end and a second end. The first end is disposed on the first electrode. The second end is disposed on the second electrode. The second conductive layer includes a first conductive portion and a second conductive portion. The first conductive portion is electrically connected to the first end and the first electrode. The second conductive portion is electrically connected to the second end and the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.