Semiconductor device
US12191368B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2021 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jan 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0128
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes active regions extending on a substrate in a first direction, gate structures intersecting the active regions and extending on the substrate in a second direction, source/drain regions in recess regions in which the active regions are recessed, on both sides of each of the gate structures, and contact plugs connected to the source/drain regions, wherein each of the source/drain regions include first and second epitaxial layers sequentially stacked on the active regions in the recess regions in a third direction perpendicular to an upper surface of the substrate, respectively, and wherein ratios of the first epitaxial layer thickness in the third direction to the second epitaxial layer thickness in the third direction are different in different ones of the source/drain regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.