Method for fabricating displaying backplane, displaying backplane and displaying device
US12193273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2023 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Nov 17, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a displaying backplane and a displaying device, and relates to the technical field of displaying. The displaying backplane includes: a substrate base plate; a first active layer and a second active layer that are provided on the substrate base plate, wherein the material of the first active layer and the second active layer is an oxide semiconductor, the first active layer has a first channel region and first no-channel regions, and the second active layer has a second channel region and second no-channel regions; a first grid insulating layer covering the first active layer and the second active layer; and a first grid and a second grid that are provided on the first grid insulating layer; wherein the oxygen-vacancy concentration of the first channel region is greater than the oxygen-vacancy concentrations of the first no-channel regions, the second no-channel regions and the second channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.