Operating method of an electronic device
US12197352B2 · kind B2 · utility
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5References
15Claims
0Family size
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Key dates
| Filing date | Jul 19, 2022 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Jul 19, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An operating method of an electronic device which includes a processor and a memory, the method including: accessing, using the processor, the memory without control of an external host device in a first bias mode; sending, from the processor, information of the memory to the external host device when the first bias mode ends; and accessing, using the processor, the memory under control of the external host device in a second bias mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.