Hardware implementation of windowed operations in three or more dimensions
US12198034B2 · kind B2 · utility
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3References
16Claims
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Key dates
| Filing date | Sep 22, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Mar 5, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system and method are disclosed, for implementing a windowed operation in at least three traversed dimensions. The data processing system maps the windowed operation in at least three traversed dimensions to a plurality of constituent windowed operations in two traversed dimensions. This plurality of 2-D windowed operations is implemented as such in at least one hardware accelerator. The data processing system assembles the results of the constituent 2-D windowed operations to produce the result of the windowed operation in at least three traversed dimensions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.