Silicon nitride films having reduced interfacial strain
US12198926B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Aug 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7624
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In some embodiments a method comprises depositing a first silicon nitride layer on a top surface of a semiconductor wafer and forming one or more first gaps in the first silicon nitride layer. The one or more first gaps can relieve stress formed in the first silicon nitride layer. A first fill material is deposited on the first silicon nitride layer and the first silicon nitride layer is planarized. A second silicon nitride layer is deposited across the first silicon nitride layer and one or more second gaps are formed in the second silicon nitride layer. The one or more second gaps can relieve stress formed in the second silicon nitride layer. A second fill material is deposited across the second silicon nitride layer and the second silicon nitride layer is planarized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.