Semiconductor device
US12199040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Apr 7, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device comprising a first logic cell and a second logic cell on a substrate. Each of the first and second logic cells includes a first active region and a second active region that are adjacent to each other in a first direction, a gate electrode that runs across the first and second active regions and extends lengthwise in the first direction, and a first metal layer on the gate electrode. The first metal layer includes a first power line and a second power line that extend lengthwise in a second direction perpendicular to the first direction, and are parallel to each other. The first and second logic cells are adjacent to each other in the second direction along the first and second power lines. The first and second active regions extend lengthwise in the second direction from the first logic cell to the second logic cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.