Semiconductor device and electronic system including the same
US12199044B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2022 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Jul 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A peripheral circuit structure may include peripheral circuits and peripheral circuit lines on a semiconductor substrate, a semiconductor layer including cell array and connection regions on the peripheral circuit structure, a stack including electrodes stacked on the semiconductor layer having a stepwise structure on the connection region, and a planarization insulating layer covering the stack, vertical structures on the cell array region penetrating the stack, including a data storage pattern, a dam group including insulating dams on the connection region penetrating the stack, penetration plugs penetrating the insulating dams and connected to respective peripheral circuit lines, the dam group including a first insulating dam farthest from the cell array region, the first insulating dam including first and second sidewall portions spaced apart, a difference between upper and lower thicknesses of the second sidewall portion of the first insulating dam is larger than that of the first sidewall portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.