Shallow trench isolation processing with local oxidation of silicon
US12199091B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Oct 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing an electronic device includes forming a shallow trench isolation (STI) structure on or in a semiconductor surface layer and forming a mask on the semiconductor surface layer, where the mask exposes a surface of a dielectric material of the STI structure and a prospective local oxidation of silicon (LOCOS) portion of a surface of the semiconductor surface layer. The method also includes performing an oxidation process using the mask to oxidize silicon in an indent in the dielectric material of the STI structure and to grow an oxide material on the exposed LOCOS portion of the surface of the semiconductor surface layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.