System and method for controlling parallel inverters coupled to common DC bus capacitor
US12199496B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2023 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Jul 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53871
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A capacitor has a known capacitance value for filtering the ripple current of the DC voltage bus. A first modulation index estimator is configured to estimate a first modulation index of the first inverter. A second modulation index estimator configured to estimate a second modulation index of the second inverter. A current estimator is configured to estimate an interleaving phase shift angle associated with a respective one of a set of inverters based on the known capacitance value of the capacitor, the estimated first modulation index, the estimated second modulation index, the first control input and the second control input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.