Information processing method, ethernet switching chip and storage medium
US12199887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2020 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Nov 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An information processing method, an Ethernet switching chip and a storage medium are provided. The method includes: executing, by a master IP core, one of following operations: updating a global information table of the master IP core according to first information corresponding to the information processing request, and sending the first information to each slave IP core; updating a dedicated information table of the master IP core according to second information corresponding to the information processing request, or, sending, to a corresponding slave IP core, third information corresponding to the information processing request; or acquiring fourth information from the global information table or the dedicated information table of the master IP core based on the information processing request and sending the fourth information to a processor, or, acquiring fifth information from a corresponding slave IP core and sending the fifth information to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.