Memory device for performing in-memory processing
US12204796B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2022 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Feb 23, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes: memory operation circuitries to perform memory processing; memory banks assigned to one of the memory operation circuitries such that a set of n memory banks is assigned to each of the memory operation circuitries; and command pads to receive a command signal from an external source, wherein, for each of the memory operation circuitries, a corresponding memory operation circuitry to access memory banks of a corresponding set of n memory banks that is assigned to the corresponding memory operation circuitry, in an order determined based on respective distances from each of the memory banks of the corresponding set of n memory banks to the command pads, and wherein, each of the memory banks of the corresponding set of n memory banks to perform an access operation of data requested by the corresponding memory operation circuitry while the memory processing is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.