Sense amplifier, method for driving sense amplifier, and memory
US12205628B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 8, 2023 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Jul 22, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier includes an amplifying circuit and a voltage equalizing circuit. The amplifying circuit includes: a first P-type transistor, having a first terminal connected to a third node, a second terminal connected to a first node, and a gate connected to a first bit line; a second P-type transistor, having a first terminal connected to the third node, a second terminal connected to a second node, and a gate connected to a second bit line; a first N-type transistor, having a first terminal connected to the first node, a second terminal connected to a fourth node, and a gate connected to the first bit line; a second N-type transistor, having a first terminal connected to the second node, a second terminal connected to the fourth node, a gate connected to the second bit line. The voltage equalizing circuit is connected between the first node and the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.