Memory system and operating method of memory system
US12205670B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2022 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Feb 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory systems and operating method of a memory system are provided. The memory system utilized for performing a computing-in-memory (CiM) operation comprises a memory array and a processing circuit. The memory array comprises a plurality of memory cells. The processing circuit is coupled to the memory array and comprises a programming circuit and a control circuit. The programming circuit is coupled to the memory array and configured to perform a write operation for programming electrical characteristics of the memory cells. The control circuit is coupled to the programming circuit and configured to: receive a plurality of weight data corresponding to a plurality of weight values; and control the write operation performed by the programming circuit, so the electrical characteristics of the memory cells are programmed following a sequential order of the weight values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.