Patent · US Active

Fabrication method for superconducting circuit and superconducting quantum chip

US12207568B2 · kind B2 · utility

0Cited by
2References
16Claims
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Assignee

Inventors

Key dates

Filing dateMay 10, 2023
Grant dateJan 21, 2025
Priority date
Expiry dateMay 23, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N69/00

Abstract

Disclosed are a fabrication method for a superconducting circuit and a superconducting quantum chip. The fabrication method includes: determining, on a substrate, a first junction region located between a first electrical element and a second electrical element, and a second junction region located between a first conductive plate and a second conductive plate that are formed in advance; forming a Josephson junction in the second junction region; detect an electrical parameter of the Josephson junction, and determining whether the electrical parameter is within a target parameter range; if yes, separating the Josephson junction through cutting, and moving the Josephson junction to the first junction region; and forming a first connection structure connecting the first superconducting layer to the first electrical element and a second connection structure connecting the second superconducting layer to the second electrical element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.