Method for implementing Vptat multiplier in high accuracy thermal sensor
US12209919B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2024 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Jan 8, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01K2219/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for determining temperature of a chip, includes generating a first voltage and a second voltage using a pair of bipolar-junction transistors, and generating a third voltage using another bipolar-junction transistor. When a most recent bit of a bitstream is a logic-zero, the difference between the first and second voltages is sampled using a switched-capacitor input-sampling circuit, and a difference between the first and second voltages is integrated, to produce a proportional-to-absolute-temperature voltage. The proportional-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. When the most recent bit of the bitstream is a logic-one, the third voltage is sampled using the switched-capacitor input-sampling circuit, and the third voltage is integrated, to produce a complementary-to-absolute-temperature voltage. The complementary-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. The bitstream is filtered and decimated to produce an output code representative of the temperature of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.