Permission control via data redundancy in deterministic streaming system
US12210642B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2022 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Jul 20, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments are directed to a computing system with permission control via data redundancy. The computing system includes a memory and a permission control circuit coupled to the memory. The permission control circuit encodes a first data vector by using a bit position register with a first permission control code for a first user, writes the encoded first data vector into the memory, and updates content of the bit position register from the first permission control code to a second permission control code for a second user. The encoded first data vector written into the memory is inaccessible for the second user based on the updated content of the bit position register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.