Memory system, operating method and controller
US12210756B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 10, 2022 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Sep 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system, an operating method and a controller are provided. The memory system comprises a memory array and a controller. The memory array comprises a probing memory block and a plurality of memory blocks. The controller is configured to perform; write a probing data to the probing memory block; detect a strength of the probing data from the probing memory block to obtain an aging condition of the memory array; and control each memory block to be enabled or disabled according to the aging condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.