Memory device, memory system, and operation method of memory device
US12211581B2 · kind B2 · utility
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18References
12Claims
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Key dates
| Filing date | Oct 18, 2022 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Dec 15, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.