Incremental delta modulation for analog to digital converter signal to noise ratio and linearity enhancement

US12212329B2 · kind B2 · utility

Assignee

• Avago Technologies International Sales Pte. Limited · SG

Inventors

• Kareem Abdelghani Ibraheem Mohamed Ragab · Irvine, US
• Xiaofeng Lin · Beijing, CN
• Darwin Cheung · Irvine, US
• Chi-Neng Mo · Daxi District, TW
• Vinay Chandrasekhar · Irvine, US
• Jungwoo Song · Irvine, US
• Xicheng Jiang · Irvine, US

Key dates

• Filing date: Mar 3, 2023
• Grant date: Jan 28, 2025
• Expiry date: Aug 24, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M3/39
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A device (e.g., SAR ADC device) include a DAC circuit and generates a digital output based on logic circuitry that includes SAR logic. Additional logic circuitry includes delta modulation circuitry and dynamic element matching circuitry. The delta modulation circuitry provides several digital outputs of the SAR DAC, while the dynamic element matching circuitry selects a different set of capacitors from the DAC circuit. Each cycle is added together and averaged, and then added to the digital output from the SAR logic.