Method for correcting mask pattern, apparatus for correcting mask pattern and method for manufacturing semiconductor device
US12216979B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 2022 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | Jun 26, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70441
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for correcting a mask patter includes: acquiring an initial pattern of a mask, the initial pattern including a scribe line area and die areas which are spaced, and the scribe line area is located between two adjacent die areas, each of the die areas includes at least one die sub-area and at least one first sub-test element group (TEG) area, and the scribe line area includes scribe line sub-areas and second sub-TEG areas, the first sub-TEG area and the second sub-TEG area are adjacent to each other, and the first sub-TEG area and the second sub-TEG area constitute a TEG area; performing an optical proximity correction (OPC) on an area of the initial pattern excluding TEG areas, so as to acquire a final pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.