Non-volatile memory device
US12217791B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2022 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | May 6, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes: one or more memory blocks including a plurality of memory cells connected to a plurality of word lines, and a plurality of memory cell strings; a page buffer unit; one or more pass units including a plurality of pass transistors that may supply operation voltages to the plurality of word lines; one or more monitoring units including one or more monitoring pass transistors connected to the plurality of pass transistors; a voltage generator that may supply activation voltages to a first pass transistor, in which a leakage current is to be measured, and to the one or more monitoring pass transistors; and a control logic that may control the voltage generator to generate the activation voltages by using a voltage control signal and detect the leakage current based on monitoring voltages output from the one or more monitoring pass transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.