Semiconductor device and manufacturing method thereof
US12218129B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2022 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | Mar 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
A semiconductor device including fin field-effect transistors, includes a first gate structure extending in a first direction, a second gate structure extending the first direction and aligned with the first gate structure in the first direction, a third gate structure extending in the first direction and arranged in parallel with the first gate structure in a second direction crossing the first direction, a fourth gate structure extending the first direction, aligned with the third gate structure and arranged in parallel with the second gate structure, an interlayer dielectric layer disposed between the first to fourth gate electrodes, and a separation wall made of different material than the interlayer dielectric layer and disposed between the first and third gate structures and the second and fourth gate structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.