Method for manufacturing semiconductor structure and semiconductor structure
US12218183B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 2022 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | May 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
The present disclosure provides a method for manufacturing a semiconductor structure and a semiconductor structure. The method for manufacturing a semiconductor structure includes: forming a plurality of capacitor holes on a substrate, and exposing a part of the substrate on bottoms of the capacitor holes; forming a bottom electrode layer on surfaces of the capacitor holes; forming, on a surface of the bottom electrode layer, a dielectric layer continuously covering the surface of the bottom electrode layer; forming a first top electrode layer to continuously cover a surface of the dielectric layer by a first film forming process; by a second film forming process, forming, in a circumferential direction of the capacitor holes, a second top electrode layer continuously covering a surface of the first top electrode layer, and forming, in an axial direction of the capacitor holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.