Method of manufacturing semiconductor structure and semiconductor structure

US12219752B2 · kind B2 · utility

Assignee

• CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

• Cheng-Kuen Chen · Hefei, CN
• Hai-Han Hung · Hefei, CN
• Chun-Chieh Huang · Taoyuan, TW
• Xiaoling Wang · Hefei, CN

Key dates

• Filing date: Jan 24, 2022
• Grant date: Feb 4, 2025
• Expiry date: Jan 27, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/34

Abstract

The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method includes: providing a base and forming, on the base, a bit line contact region provided with a first groove; forming a first bit line contact layer in the first groove, wherein the first bit line contact layer in the first groove defines a second groove; forming a diffusion layer in the second groove, wherein the diffusion layer in the second groove defines a third groove; forming, in the third groove, a second bit line contact layer provided with a gap; and processing the diffusion layer.