Display panel including lower pattern on first barrier layer and display device including the same
US12219830B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | May 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/8731
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A display device includes a substrate, a first barrier layer on the substrate, a lower pattern on the first barrier layer and having a mesh shape defining a disconnection area, a second barrier layer on the first barrier layer, covering the lower pattern, and contacting the first barrier layer in the disconnection area, and a first active pattern on the second barrier layer and overlapping the lower pattern, a gate electrode on the first active pattern and overlapping the lower pattern, a first gate line on the first active pattern extending in a first direction, a second active pattern on the first gate line, a second gate line on the second active pattern extending in the first direction, and a data line on the second gate line extending in a second direction crossing the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.