Patent · US Active

Array substrate, fabricating method therefor and display panel

US12219851B2 · kind B2 · utility

0Cited by
3References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 22, 2023
Grant dateFeb 4, 2025
Priority date
Expiry dateMay 22, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K2102/103

Abstract

The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.