Multi-layer coating
US12221687B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2020 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Feb 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/332
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The invention relates to a method for coating a substrate 40, a coating system for carrying out the method, and a coated body. In a first method step 62, the substrate 40 is pretreated in a ion etching process. In a second method step 64, a first coating layer 56a with a thickness of 0.1 μm to 6 μm is deposited on the substrate 40 by means of a PVD process. In order to achieve a particularly high-quality and durable coating 50, the surface of the first coating layer 56a is treated by means of an ion etching process in a third method step 66, and an additional coating layer 56b with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer 56a by means of a PVD process in a fourth method step 68. The coated body comprises at least two coating layers 56a, 56b, 56c, 56d with a thickness of 0.1 μm to 6 μm on a substrate 40, wherein an interface region formed by ion etching is arranged between the coating layers 56a, 56b, 56c, 56d.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.