Array substrate and display apparatus
US12222617B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 2, 2021 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Oct 28, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/134372
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure relates to the field of display technology, and in particular, to an array substrate and a display apparatus. The array substrate has a display area and a peripheral wiring area provided at at least one side of the display area. The display area includes a thin film transistor and a common electrode formed on the base substrate; the peripheral wiring area includes a first lead, a gate signal line and a common signal line formed on the base substrate; the first lead and the gate electrode of the thin film transistor are arranged in an identical layer and are electrically connected; the gate signal line is located on a side of the first lead away from the base substrate, and is electrically connected to the first lead through a first transition structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.