Traffic isolation at a chip-to-chip gateway of a data processing system
US12222826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | May 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/805
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism for error containment in a data processing system includes receiving a transaction request at a gateway between a host and a device, allocating an entry for the request in a local request tracker of the gateway and sending a link request, to a port of the gateway. In response to an isolation trigger, the port is moved into isolation by completing in-process requests with entries in the tracker and locking the entries. On receiving a response to an in-process request while the port is in isolation, the response is dropped, the associated entry is unlocked, and allocation of the entry is enabled. A completion response is sent to the requester without dispatching a new link request to the port. When requests are completed, the system is quiesced, locked entries are unlocked, and the port is moved out of isolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.