Line-based chip card tamper detection
US12223507B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Apr 20, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F7/0873
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
A transaction device can implement a monitoring system to detect for tamper attempts at a chip card interface. The monitoring system can establish a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card is present in the slot. During subsequent evaluations of the chip card interface by the monitoring system, a response received by the monitoring system that deviates from the baseline can indicate that a tamper attempt at the chip card interface may have occurred. If a tamper attempt is determined by the monitoring system, a remedial or corrective action can be taken.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.