Gate drive circuit and display panel
US12223887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Nov 5, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive circuit and a display panel. The gate drive circuit includes one or more shift register groups. Each of the shift register groups includes N shift adjacent registers that output in sequence, with N being an integer greater than or equal to 3. Each of the shift registers includes a first output stage and a frequency division control module. The first output stage is configured to output a gate drive signal. The frequency division control module is configured to control outputting of the gate drive signal based on a refresh frequency. A control end of each frequency division control module in each of the shift register groups receives a control signal with a different phase and a same frequency, respectively, to adjust a pulse width of the gate drive signal and maintain a same pulse width at different refresh frequencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.