Storage cell and data read/write method and storage array thereof
US12223990B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2020 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | May 18, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1675
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a storage cell and a data read/write method and storage array thereof. The storage cell includes a bit line, a tunnel junction, and four access transistors. Each access transistor includes at least an active region. The active region includes a source. The sources of the access transistors are all electrically connected to a first end of the tunnel junction. A second end of the tunnel junction is electrically connected to the bit line, and the bit line extends along a first direction. The active regions of the access transistors are isolated from one another. Long-side extension directions of the active regions of the access transistors are the same, and a first angle θ is formed between the long-side extension directions of the active regions and the first direction; wherein θ is a non-right angle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.