Address signal transmission circuit, address signal transmission method and storage system
US12224039B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 2, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Jul 16, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address signal transmission circuit includes a transmission control circuit, connected to an address bus, configured to receive address signals from the address bus, acquire a first address signal and a second address signal, and generate and output an inversion flag signal based on the first address signal and the second address signal, where the first address signal is an address signal received in a previous time and the second address signal is a currently received address signal; and a selection circuit, connected to the address bus, configured to receive the address signals from the address bus, determine, in response to the inversion flag signal, whether the second address signal is to be inverted, and correspondingly output one of the second address signal or an address inverted signal, where the selection circuit inverts the second address signal to obtain the address inverted signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.