Manufacturing method of an input circuit of a flip-flop
US12224753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Aug 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of an input circuit of a flip-flop including: depositing a first gate strip, a second gate strip, a third gate strip, and a fourth gate strip, wherein a distance between the first and second gate strips, a distance between the second and third gate strips, and a distance between the third and fourth gate strips equal; executing a cut-off operation upon the first gate strip to generate a first first gate strip and a second first gate strip; executing a cut-off operation upon the third gate strip to generate a first third gate strip and a second third gate strip; and directing a first signal to the first first gate strip and the second third gate strip, and a second signal to the second first gate strip and the first third gate strip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.