Method for manufacturing semiconductor structure, semiconductor structure and semiconductor memory

US12225707B2 · kind B2 · utility

Assignee

• CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

• Xingsong SU · Hefei, CN
• Weiping BAI · Hefei, CN
• Deyuan Xiao · Shanghai, CN

Key dates

• Filing date: Aug 15, 2022
• Grant date: Feb 11, 2025
• Expiry date: Sep 30, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0387

Abstract

A method for manufacturing a semiconductor structure includes: providing a substrate; patterning the substrate to form a substrate layer and a plurality of silicon pillars; forming an oxide layer on a surface of the substrate layer between the plurality of silicon pillars; forming an isolation structure on the oxide layer, gaps being provided between upper part of the isolation structure and the silicon pillars; forming a first conductive layer in the gaps; partially removing the isolation structure and retaining the isolation structure below the first conductive layer to form an isolation layer; and forming a dielectric layer and a second conductive layer on surfaces of the isolation layer, the oxide layer, the first conductive layer and the silicon pillars.