Power-optimized and shared buffer
US12229439B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Aug 2, 2023 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Aug 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network device, a network interface controller, and a switch are provided. In one example, a shared buffer includes a plurality of cells of memory, one or more ports read data from the shared buffer and write data to the shared buffer, and a controller circuit selectively enables and disables cells of memory of the shared buffer based on an amount of data stored in the shared buffer. Power consumption of the shared buffer is in proportion to a number of enabled cells of memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.