Shift register, scan driving circuit and display apparatus
US12230217B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 25, 2022 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Mar 25, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes: a first input circuit, a first output circuit, a second input circuit, a second output circuit and at least one functional circuit. The first input circuit is configured to transmit an input signal to the first node under control of a first control signal. The first output circuit is configured to transmit a first output signal to the first scan signal terminal under control of the first node. The second input circuit is configured to transmit a first voltage signal to the second node under control of a second control signal. The second output circuit is configured to transmit a second output signal to the first scan signal terminal under control of the second node. A functional circuit is configured to block a path between the functional input terminal and the functional output terminal under control of a functional control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.