Electronic device and driving method thereof
US12230339B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 12, 2022 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Jul 12, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides an electronic device and a driving method. The electronic device comprises: a sensitivity amplifier and a voltage adjustment circuit. The sensitivity amplifier includes: a first P-type transistor, a second P-type transistor, a first N-type transistor, a second N-type transistor, and a control circuit. The control circuit is connected to the third node, the fourth node, and a preset voltage terminal. A first control signal terminal responds to the signal of the first control signal terminal to connect the preset voltage terminal and the third node and the fourth node. The preset voltage terminal inputs a preset voltage signal. The electronic device write a preset voltage signal of a suitable size to the sensitivity amplifier through the voltage adjustment circuit, so that the sensitivity amplifier has an appropriate voltage difference between the bit line and the complementary bit line during offset elimination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.