Thin film transistor having a semiconductor layer comprising a plurality of semiconductor branches
US12230683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2021 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Sep 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor including a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer including a plurality of semiconductor branches; a plurality of source electrode branches. The plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.