Type-I PLLs for phase-controlled applications
US12231136B2 · kind B2 · utility
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Key dates
| Filing date | Mar 18, 2022 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Mar 25, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A type I phase locked loop (PLL) includes an oscillator and a feedback path to a phase detector. A first frequency and first relative phase of a first output signal are locked to a frequency and a phase of a first input signal. A second frequency and second relative phase of a second output signal are locked to a frequency and a phase of a second input signal. A correction to the PLL is applied to perform one of: adjusting the second relative phase to equal the first relative phase and adjusting the oscillator frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.