Patent · US Active

Method and timing recovery circuit for recovering a sampling clock from a serial data stream encoded using PAM

US12231526B2 · kind B2 · utility

0Cited by
5References
20Claims
0Family size

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Key dates

Filing dateAug 2, 2021
Grant dateFeb 18, 2025
Priority date
Expiry dateAug 2, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/0062
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A method and timing recovery circuit for recovering a sampling clock from a serial data stream encoded using Pulse-Amplitude-Modulation applies a filter pattern decoder to detected symbol sequence at more than two adjacent data symbols, particularly to the detected symbol patterns of four adjacent samples ŷ(k−2), ŷ(k−1), ŷ(k), ŷ(k+1), and calculates an estimated phase error e(k).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.