Patent · US Active

Method for manufacturing semiconductor structure, semiconductor structure and semiconductor memory

US12232330B2 · kind B2 · utility

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20Claims
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Key dates

Filing dateJun 1, 2022
Grant dateFeb 18, 2025
Priority date
Expiry dateJun 28, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N50/01

Abstract

A method for manufacturing a semiconductor structure includes the following: providing a substrate; forming an MTJ structure and a first mask structure in sequence on the substrate; performing a patterning process on the first mask structure to form a first pattern extending in a first direction; transferring the first pattern to the MTJ structure; forming a second mask structure on the MTJ structure; performing a patterning process on the second mask structure to form a second pattern extending in a second direction, the first direction intersecting the second direction and being not perpendicular to the second direction; and performing a patterning process on the MTJ structure by utilizing the second pattern to form a cellular MTJ array, the first pattern and the second pattern together forming a cellular pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.