Low-voltage operation dual-gate organic thin-film transistors and methods of manufacturing thereof
US12232338B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 7, 2020 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Sep 21, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/441
Abstract
A thin-film transistor (TFT), includes: a substrate (202); an organic semiconductor (OSC) layer (210) positioned on the substrate; a dielectric layer (214) positioned on the OSC layer; and a polymeric interlayer (212) disposed in-between the OSC layer and the dielectric layer, such that the dielectric layer is configured to exhibit a double layer capacitance effect. A method of forming a thin-film transistor, includes: providing a substrate; providing a bottom gate layer atop the substrate; disposing consecutively from the substrate, an organic semiconductor (OSC) layer, a dielectric layer, and a top gate layer; and patterning the OSC layer, the dielectric layer, and the top gate layer using a single mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.