Decoder for a receiver
US12235366B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 7, 2021 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Apr 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0059
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A non-systematic convolutional decoder of a convolutionally encoded multi-level data stream includes a shift register and two or more paths of exclusive-OR (XOR) gates, arranged to reconstruct an original input information stream, each path having a quantiser arranged to quantise the signal to two levels, and a set of XOR gates arranged to match an encoding path in an associated convolutional encoder, and a selector arranged to feed an output from each path to a single input of the shift register. If the paths have differing values at their output, the selector may choose the value from the path based upon a function of the multi-level signals associated with each path, such as the path with the largest absolute signal level. The decoder provides a simple means for decoding signals while allowing the signal to also or instead be decoded using e.g. a Viterbi decoder if higher performance is required.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.